openvm_algebra_transpiler/
lib.rs

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
use openvm_algebra_guest::{
    ComplexExtFieldBaseFunct7, ModArithBaseFunct7, COMPLEX_EXT_FIELD_FUNCT3,
    MODULAR_ARITHMETIC_FUNCT3, OPCODE,
};
use openvm_instructions::{
    instruction::Instruction, riscv::RV32_REGISTER_NUM_LIMBS, UsizeOpcode, VmOpcode,
};
use openvm_instructions_derive::UsizeOpcode;
use openvm_stark_backend::p3_field::PrimeField32;
use openvm_transpiler::{util::from_r_type, TranspilerExtension};
use rrs_lib::instruction_formats::RType;
use strum::{EnumCount, EnumIter, FromRepr};

#[derive(
    Copy, Clone, Debug, PartialEq, Eq, PartialOrd, Ord, EnumCount, EnumIter, FromRepr, UsizeOpcode,
)]
#[opcode_offset = 0x500]
#[repr(usize)]
#[allow(non_camel_case_types)]
pub enum Rv32ModularArithmeticOpcode {
    ADD,
    SUB,
    SETUP_ADDSUB,
    MUL,
    DIV,
    SETUP_MULDIV,
    IS_EQ,
    SETUP_ISEQ,
}

#[derive(
    Copy, Clone, Debug, PartialEq, Eq, PartialOrd, Ord, EnumCount, EnumIter, FromRepr, UsizeOpcode,
)]
#[opcode_offset = 0x710]
#[repr(usize)]
#[allow(non_camel_case_types)]
pub enum Fp2Opcode {
    ADD,
    SUB,
    SETUP_ADDSUB,
    MUL,
    DIV,
    SETUP_MULDIV,
}

#[derive(Default)]
pub struct ModularTranspilerExtension;

#[derive(Default)]
pub struct Fp2TranspilerExtension;

impl<F: PrimeField32> TranspilerExtension<F> for ModularTranspilerExtension {
    fn process_custom(&self, instruction_stream: &[u32]) -> Option<(Instruction<F>, usize)> {
        if instruction_stream.is_empty() {
            return None;
        }
        let instruction_u32 = instruction_stream[0];
        let opcode = (instruction_u32 & 0x7f) as u8;
        let funct3 = ((instruction_u32 >> 12) & 0b111) as u8;

        if opcode != OPCODE {
            return None;
        }
        if funct3 != MODULAR_ARITHMETIC_FUNCT3 {
            return None;
        }

        let instruction = {
            let dec_insn = RType::new(instruction_u32);
            let base_funct7 =
                (dec_insn.funct7 as u8) % ModArithBaseFunct7::MODULAR_ARITHMETIC_MAX_KINDS;
            assert!(
                Rv32ModularArithmeticOpcode::COUNT
                    <= ModArithBaseFunct7::MODULAR_ARITHMETIC_MAX_KINDS as usize
            );
            let mod_idx_shift = ((dec_insn.funct7 as u8)
                / ModArithBaseFunct7::MODULAR_ARITHMETIC_MAX_KINDS)
                as usize
                * Rv32ModularArithmeticOpcode::COUNT;
            if base_funct7 == ModArithBaseFunct7::SetupMod as u8 {
                let local_opcode = match dec_insn.rs2 {
                    0 => Rv32ModularArithmeticOpcode::SETUP_ADDSUB,
                    1 => Rv32ModularArithmeticOpcode::SETUP_MULDIV,
                    2 => Rv32ModularArithmeticOpcode::SETUP_ISEQ,
                    _ => panic!("invalid opcode"),
                };
                Some(Instruction::new(
                    VmOpcode::from_usize(local_opcode.with_default_offset() + mod_idx_shift),
                    F::from_canonical_usize(RV32_REGISTER_NUM_LIMBS * dec_insn.rd),
                    F::from_canonical_usize(RV32_REGISTER_NUM_LIMBS * dec_insn.rs1),
                    F::ZERO, // rs2 = 0
                    F::ONE,  // d_as = 1
                    F::TWO,  // e_as = 2
                    F::ZERO,
                    F::ZERO,
                ))
            } else {
                let global_opcode = match ModArithBaseFunct7::from_repr(base_funct7) {
                    Some(ModArithBaseFunct7::AddMod) => {
                        Rv32ModularArithmeticOpcode::ADD as usize
                            + Rv32ModularArithmeticOpcode::default_offset()
                    }
                    Some(ModArithBaseFunct7::SubMod) => {
                        Rv32ModularArithmeticOpcode::SUB as usize
                            + Rv32ModularArithmeticOpcode::default_offset()
                    }
                    Some(ModArithBaseFunct7::MulMod) => {
                        Rv32ModularArithmeticOpcode::MUL as usize
                            + Rv32ModularArithmeticOpcode::default_offset()
                    }
                    Some(ModArithBaseFunct7::DivMod) => {
                        Rv32ModularArithmeticOpcode::DIV as usize
                            + Rv32ModularArithmeticOpcode::default_offset()
                    }
                    Some(ModArithBaseFunct7::IsEqMod) => {
                        Rv32ModularArithmeticOpcode::IS_EQ as usize
                            + Rv32ModularArithmeticOpcode::default_offset()
                    }
                    _ => unimplemented!(),
                };
                let global_opcode = global_opcode + mod_idx_shift;
                Some(from_r_type(global_opcode, 2, &dec_insn))
            }
        };
        instruction.map(|instruction| (instruction, 1))
    }
}

impl<F: PrimeField32> TranspilerExtension<F> for Fp2TranspilerExtension {
    fn process_custom(&self, instruction_stream: &[u32]) -> Option<(Instruction<F>, usize)> {
        if instruction_stream.is_empty() {
            return None;
        }
        let instruction_u32 = instruction_stream[0];
        let opcode = (instruction_u32 & 0x7f) as u8;
        let funct3 = ((instruction_u32 >> 12) & 0b111) as u8;

        if opcode != OPCODE {
            return None;
        }
        if funct3 != COMPLEX_EXT_FIELD_FUNCT3 {
            return None;
        }

        let instruction = {
            assert!(
                Fp2Opcode::COUNT <= ComplexExtFieldBaseFunct7::COMPLEX_EXT_FIELD_MAX_KINDS as usize
            );
            let dec_insn = RType::new(instruction_u32);
            let base_funct7 =
                (dec_insn.funct7 as u8) % ComplexExtFieldBaseFunct7::COMPLEX_EXT_FIELD_MAX_KINDS;
            let complex_idx_shift = ((dec_insn.funct7 as u8)
                / ComplexExtFieldBaseFunct7::COMPLEX_EXT_FIELD_MAX_KINDS)
                as usize
                * Fp2Opcode::COUNT;

            if base_funct7 == ComplexExtFieldBaseFunct7::Setup as u8 {
                let local_opcode = match dec_insn.rs2 {
                    0 => Fp2Opcode::SETUP_ADDSUB,
                    1 => Fp2Opcode::SETUP_MULDIV,
                    _ => panic!("invalid opcode"),
                };
                Some(Instruction::new(
                    VmOpcode::from_usize(local_opcode.with_default_offset() + complex_idx_shift),
                    F::from_canonical_usize(RV32_REGISTER_NUM_LIMBS * dec_insn.rd),
                    F::from_canonical_usize(RV32_REGISTER_NUM_LIMBS * dec_insn.rs1),
                    F::ZERO, // rs2 = 0
                    F::ONE,  // d_as = 1
                    F::TWO,  // e_as = 2
                    F::ZERO,
                    F::ZERO,
                ))
            } else {
                let global_opcode = match ComplexExtFieldBaseFunct7::from_repr(base_funct7) {
                    Some(ComplexExtFieldBaseFunct7::Add) => {
                        Fp2Opcode::ADD as usize + Fp2Opcode::default_offset()
                    }
                    Some(ComplexExtFieldBaseFunct7::Sub) => {
                        Fp2Opcode::SUB as usize + Fp2Opcode::default_offset()
                    }
                    Some(ComplexExtFieldBaseFunct7::Mul) => {
                        Fp2Opcode::MUL as usize + Fp2Opcode::default_offset()
                    }
                    Some(ComplexExtFieldBaseFunct7::Div) => {
                        Fp2Opcode::DIV as usize + Fp2Opcode::default_offset()
                    }
                    _ => unimplemented!(),
                };
                let global_opcode = global_opcode + complex_idx_shift;
                Some(from_r_type(global_opcode, 2, &dec_insn))
            }
        };
        instruction.map(|instruction| (instruction, 1))
    }
}