Expand description
RISC-V instruction set simulator library
Containts the building blocks for a RISC-V ISS. The seperate rrs-cli uses rrs-lib to implement a CLI driven ISS.
Re-exports§
pub use process_instruction::process_instruction;
Modules§
- An InstructionProcessor that executes instructions.
- Structures and constants for instruction decoding
- An InstructionProcessor that outputs a string of the instruction disassembly
- Various Memory implementations useful for an ISS and utility functions
Structs§
- State of a single RISC-V hart (hardware thread)
Enums§
- The different sizes used for memory accesses
Traits§
- A trait for objects which do something with RISC-V instructions (e.g. execute them or print a disassembly string).
- A trait for objects which implement memory operations