Trait VmCoreAir

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pub trait VmCoreAir<AB, I>: BaseAirWithPublicValues<AB::F>
where AB: AirBuilder, I: VmAdapterInterface<AB::Expr>,
{ // Required methods fn eval( &self, builder: &mut AB, local_core: &[AB::Var], from_pc: AB::Var, ) -> AdapterAirContext<AB::Expr, I>; fn start_offset(&self) -> usize; // Provided methods fn start_offset_expr(&self) -> AB::Expr { ... } fn expr_to_global_expr(&self, local_expr: impl Into<AB::Expr>) -> AB::Expr { ... } fn opcode_to_global_expr(&self, local_opcode: impl LocalOpcode) -> AB::Expr { ... } }

Required Methods§

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fn eval( &self, builder: &mut AB, local_core: &[AB::Var], from_pc: AB::Var, ) -> AdapterAirContext<AB::Expr, I>

Returns (to_pc, interface).

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fn start_offset(&self) -> usize

The offset the opcodes by this chip start from. This is usually just CorrespondingOpcode::CLASS_OFFSET, but sometimes (for modular chips, for example) it also depends on something else.

Provided Methods§

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fn start_offset_expr(&self) -> AB::Expr

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fn expr_to_global_expr(&self, local_expr: impl Into<AB::Expr>) -> AB::Expr

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fn opcode_to_global_expr(&self, local_opcode: impl LocalOpcode) -> AB::Expr

Dyn Compatibility§

This trait is not dyn compatible.

In older versions of Rust, dyn compatibility was called "object safety", so this trait is not object safe.

Implementors§

Source§

impl<AB: InteractionBuilder + AirBuilderWithPublicValues> VmCoreAir<AB, BasicAdapterInterface<<AB as AirBuilder>::Expr, MinimalInstruction<<AB as AirBuilder>::Expr>, 2, 0, 1, 1>> for PublicValuesCoreAir

impl<AB, I, const READ_LIMBS: usize, const WRITE_LIMBS: usize, const LIMB_BITS: usize> VmCoreAir<AB, I> for ModularIsEqualCoreAir<READ_LIMBS, WRITE_LIMBS, LIMB_BITS>

impl<AB, I> VmCoreAir<AB, I> for CastFCoreAir
where AB: InteractionBuilder, I: VmAdapterInterface<AB::Expr>, I::Reads: From<[[AB::Expr; 1]; 1]>, I::Writes: From<[[AB::Expr; 4]; 1]>, I::ProcessedInstruction: From<MinimalInstruction<AB::Expr>>,

impl<AB, I> VmCoreAir<AB, I> for FieldArithmeticCoreAir
where AB: InteractionBuilder, I: VmAdapterInterface<AB::Expr>, I::Reads: From<[[AB::Expr; 1]; 2]>, I::Writes: From<[[AB::Expr; 1]; 1]>, I::ProcessedInstruction: From<MinimalInstruction<AB::Expr>>,

impl<AB, I> VmCoreAir<AB, I> for FieldExtensionCoreAir
where AB: InteractionBuilder, I: VmAdapterInterface<AB::Expr>, I::Reads: From<[[AB::Expr; 4]; 2]>, I::Writes: From<[[AB::Expr; 4]; 1]>, I::ProcessedInstruction: From<MinimalInstruction<AB::Expr>>,

impl<AB, I, const NUM_CELLS: usize> VmCoreAir<AB, I> for NativeLoadStoreCoreAir<NUM_CELLS>

impl<AB, I> VmCoreAir<AB, I> for Rv32AuipcCoreAir
where AB: InteractionBuilder, I: VmAdapterInterface<AB::Expr>, I::Reads: From<[[AB::Expr; 0]; 0]>, I::Writes: From<[[AB::Expr; 4]; 1]>, I::ProcessedInstruction: From<ImmInstruction<AB::Expr>>,

impl<AB, I> VmCoreAir<AB, I> for Rv32JalLuiCoreAir
where AB: InteractionBuilder, I: VmAdapterInterface<AB::Expr>, I::Reads: From<[[AB::Expr; 0]; 0]>, I::Writes: From<[[AB::Expr; 4]; 1]>, I::ProcessedInstruction: From<ImmInstruction<AB::Expr>>,

impl<AB, I> VmCoreAir<AB, I> for Rv32JalrCoreAir

impl<AB, I, const NUM_CELLS: usize> VmCoreAir<AB, I> for LoadStoreCoreAir<NUM_CELLS>

impl<AB, I, const NUM_CELLS: usize, const LIMB_BITS: usize> VmCoreAir<AB, I> for LoadSignExtendCoreAir<NUM_CELLS, LIMB_BITS>

impl<AB, I, const NUM_LIMBS: usize> VmCoreAir<AB, I> for BranchEqualCoreAir<NUM_LIMBS>

impl<AB, I, const NUM_LIMBS: usize, const LIMB_BITS: usize> VmCoreAir<AB, I> for BaseAluCoreAir<NUM_LIMBS, LIMB_BITS>

impl<AB, I, const NUM_LIMBS: usize, const LIMB_BITS: usize> VmCoreAir<AB, I> for BranchLessThanCoreAir<NUM_LIMBS, LIMB_BITS>

impl<AB, I, const NUM_LIMBS: usize, const LIMB_BITS: usize> VmCoreAir<AB, I> for DivRemCoreAir<NUM_LIMBS, LIMB_BITS>

impl<AB, I, const NUM_LIMBS: usize, const LIMB_BITS: usize> VmCoreAir<AB, I> for LessThanCoreAir<NUM_LIMBS, LIMB_BITS>

impl<AB, I, const NUM_LIMBS: usize, const LIMB_BITS: usize> VmCoreAir<AB, I> for MulHCoreAir<NUM_LIMBS, LIMB_BITS>

impl<AB, I, const NUM_LIMBS: usize, const LIMB_BITS: usize> VmCoreAir<AB, I> for MultiplicationCoreAir<NUM_LIMBS, LIMB_BITS>

impl<AB, I, const NUM_LIMBS: usize, const LIMB_BITS: usize> VmCoreAir<AB, I> for ShiftCoreAir<NUM_LIMBS, LIMB_BITS>