Crate openvm_rv32im_circuit

Crate openvm_rv32im_circuit 

Source

Re-exports§

pub use self::Rv32IGpuBuilder as Rv32IBuilder;
pub use self::Rv32ImGpuBuilder as Rv32ImBuilder;

Modules§

adapters

Structs§

BaseAluCoreAir
BaseAluCoreCols
BaseAluCoreRecord
BaseAluExecutor
BaseAluFiller
BranchEqualCoreAir
BranchEqualCoreCols
BranchEqualCoreRecord
BranchEqualExecutor
BranchEqualFiller
BranchLessThanCoreAir
BranchLessThanCoreCols
BranchLessThanCoreRecord
BranchLessThanExecutor
BranchLessThanFiller
DivRemCoreAir
DivRemCoreCols
DivRemCoreRecord
DivRemExecutor
DivRemFiller
LessThanCoreAir
LessThanCoreCols
LessThanCoreRecord
LessThanExecutor
LessThanFiller
LoadSignExtendCoreAir
LoadSignExtendCoreCols
LoadSignExtend Core Chip handles byte/halfword into word conversions through sign extend This chip uses read_data to construct write_data prev_data columns are not used in constraints defined in the CoreAir, but are used in constraints by the Adapter shifted_read_data is the read_data shifted by (shift_amount & 2), this reduces the number of opcode flags needed using this shifted data we can generate the write_data as if the shift_amount was 0 for loadh and 0 or 1 for loadb
LoadSignExtendCoreRecord
LoadSignExtendExecutor
LoadSignExtendFiller
LoadStoreCoreAir
LoadStoreCoreCols
LoadStore Core Chip handles byte/halfword into word conversions and unsigned extends This chip uses read_data and prev_data to constrain the write_data It also handles the shifting in case of not 4 byte aligned instructions This chips treats each (opcode, shift) pair as a separate instruction
LoadStoreCoreRecord
LoadStoreExecutor
LoadStoreFiller
MulHCoreAir
MulHCoreCols
MulHCoreRecord
MulHExecutor
MulHFiller
MultiplicationCoreAir
MultiplicationCoreCols
MultiplicationCoreRecord
MultiplicationExecutor
MultiplicationFiller
OffsetInfo
Rv32AuipcChipGpu
Rv32AuipcCoreAir
Rv32AuipcCoreCols
Rv32AuipcCoreRecord
Rv32AuipcExecutor
Rv32AuipcFiller
Rv32BaseAluChipGpu
Rv32BranchEqualChipGpu
Rv32BranchLessThanChipGpu
Rv32DivRemChipGpu
Rv32HintStoreAir
Rv32HintStoreChipGpu
Rv32HintStoreCols
Rv32HintStoreExecutor
Rv32HintStoreFiller
Rv32HintStoreMetadata
Rv32HintStoreRecordHeader
Rv32HintStoreRecordMut
SAFETY: the order of the fields in Rv32HintStoreRecord and Rv32HintStoreVar is important. The chip also assumes that the offset of the fields write_aux and data in Rv32HintStoreCols is bigger than size_of::<Rv32HintStoreRecord>()
Rv32HintStoreVar
Rv32I
RISC-V 32-bit Base (RV32I) Extension
Rv32IConfig
Rv32ICpuBuilder
Rv32IGpuBuilder
Rv32ImConfig
Config for a VM with base extension, IO extension, and multiplication extension
Rv32ImCpuBuilder
Rv32ImCpuProverExt
Rv32ImGpuBuilder
Rv32ImGpuProverExt
Rv32Io
RISC-V Extension for handling IO (not to be confused with I base extension)
Rv32JalLuiChipGpu
Rv32JalLuiCoreAir
Rv32JalLuiCoreCols
Rv32JalLuiCoreRecord
Rv32JalLuiExecutor
Rv32JalLuiFiller
Rv32JalrChipGpu
Rv32JalrCoreAir
Rv32JalrCoreCols
Rv32JalrCoreRecord
Rv32JalrExecutor
Rv32JalrFiller
Rv32LessThanChipGpu
Rv32LoadSignExtendChipGpu
Rv32LoadStoreChipGpu
Rv32M
RISC-V 32-bit Multiplication Extension (RV32M) Extension
Rv32MulHChipGpu
Rv32MultiplicationChipGpu
Rv32ShiftChipGpu
ShiftCoreAir
RV32 shift AIR. Note: when the shift amount from operand is greater than the number of bits, only shift shift_amount % num_bits bits. This matches the RV32 specs for SLL/SRL/SRA.
ShiftCoreCols
ShiftCoreRecord
ShiftExecutor
ShiftFiller

Enums§

Rv32IConfigExecutor
Rv32IExecutor
RISC-V 32-bit Base (RV32I) Instruction Executors
Rv32ImConfigExecutor
Rv32IoExecutor
RISC-V 32-bit Io Instruction Executors
Rv32MExecutor
RISC-V 32-bit Multiplication Extension (RV32M) Instruction Executors

Type Aliases§

Rv32AuipcAir
Rv32AuipcChip
Rv32BaseAluAir
Rv32BaseAluChip
Rv32BaseAluExecutor
Rv32BranchEqualAir
Rv32BranchEqualChip
Rv32BranchEqualExecutor
Rv32BranchLessThanAir
Rv32BranchLessThanChip
Rv32BranchLessThanExecutor
Rv32DivRemAir
Rv32DivRemChip
Rv32DivRemExecutor
Rv32HintStoreChip
Rv32HintStoreLayout
Rv32JalLuiAir
Rv32JalLuiChip
Rv32JalrAir
Rv32JalrChip
Rv32LessThanAir
Rv32LessThanChip
Rv32LessThanExecutor
Rv32LoadSignExtendAir
Rv32LoadSignExtendChip
Rv32LoadSignExtendExecutor
Rv32LoadStoreAir
Rv32LoadStoreChip
Rv32LoadStoreExecutor
Rv32MulHAir
Rv32MulHChip
Rv32MulHExecutor
Rv32MultiplicationAir
Rv32MultiplicationChip
Rv32MultiplicationExecutor
Rv32ShiftAir
Rv32ShiftChip
Rv32ShiftExecutor