Type Alias FieldArithmeticAir

pub type FieldArithmeticAir = VmAirWrapper<AluNativeAdapterAir, FieldArithmeticCoreAir>;

Aliased Type

struct FieldArithmeticAir {
    pub adapter: AluNativeAdapterAir,
    pub core: FieldArithmeticCoreAir,
}

Fields

adapter: AluNativeAdapterAir

core: FieldArithmeticCoreAir

Trait Implementations

impl<AB, A, M> Air<AB> for VmAirWrapper<A, M>

where AB: AirBuilder, A: VmAdapterAir<AB>, M: VmCoreAir<AB, <A as VmAdapterAir<AB>>::Interface>,

fn eval(&self, builder: &mut AB)

impl<F, A, C> BaseAir<F> for VmAirWrapper<A, C>

where A: BaseAir<F>, C: BaseAir<F>,

fn width(&self) -> usize

The number of columns (a.k.a. registers) in this AIR.

fn preprocessed_trace(&self) -> Option<DenseMatrix<F>>

impl<F, A, M> BaseAirWithPublicValues<F> for VmAirWrapper<A, M>

where A: BaseAir<F>, M: BaseAirWithPublicValues<F>,

fn num_public_values(&self) -> usize

impl<F, A, M> PartitionedBaseAir<F> for VmAirWrapper<A, M>

where A: BaseAir<F>, M: BaseAir<F>,

fn cached_main_widths(&self) -> Vec<usize>

By default, an AIR has no cached main trace.

fn common_main_width(&self) -> usize

By default, an AIR has only one private main trace.