Struct DenseRecordArena 

pub struct DenseRecordArena {
    pub records_buffer: Cursor<Vec<u8>>,
}

Fields

records_buffer: Cursor<Vec<u8>>

Implementations

impl DenseRecordArena

pub fn with_byte_capacity(size_bytes: usize) -> Self

Creates a new DenseRecordArena with the given capacity in bytes.

pub fn set_byte_capacity(&mut self, size_bytes: usize)

pub fn capacity(&self) -> usize

Returns the allocated size of the arena in bytes.

Note: This may include additional bytes for alignment.

pub fn alloc_bytes<'a>(&mut self, count: usize) -> &'a mut [u8]

Allocates count bytes and returns as a mutable slice.

pub fn allocated(&self) -> &[u8]

pub fn allocated_mut(&mut self) -> &mut [u8]

pub fn align_to(&mut self, alignment: usize)

pub fn get_record_seeker<R, L>( &mut self, ) -> RecordSeeker<'_, DenseRecordArena, R, L>

Trait Implementations

impl Arena for DenseRecordArena

fn with_capacity(height: usize, width: usize) -> Self

Currently width always refers to the main trace width.

fn is_empty(&self) -> bool

fn allocated_bytes(&self) -> Option<usize>

fn current_trace_height(&self) -> usize

Only used for metric collection purposes. Intended usage is that for a record arena that corresponds to a single trace matrix, this function can extract the current number of used rows of the corresponding trace matrix. This is currently expected to work only for MatrixRecordArena.

impl Chip<DenseRecordArena, GenericGpuBackend<BabyBearPoseidon2HashScheme>> for PhantomChipGPU

fn generate_proving_ctx( &self, arena: DenseRecordArena, ) -> AirProvingContext<GpuBackend>

Generate all necessary context for proving a single AIR.

fn constant_trace_height(&self) -> Option<usize>

If this chip always produces a trace with a fixed number of rows (independent of execution), return that height. Used by metered execution to avoid resetting constant-height chips on segment boundaries.

impl<'a, A, C, M> RecordArena<'a, AdapterCoreLayout<M>, (A, C)> for DenseRecordArena

where [u8]: CustomBorrow<'a, A, AdapterCoreLayout<M>> + CustomBorrow<'a, C, AdapterCoreLayout<M>>, M: Clone, A: SizedRecord<AdapterCoreLayout<M>>, C: SizedRecord<AdapterCoreLayout<M>>,

RecordArena implementation for DenseRecordArena, with AdapterCoreLayout NOTE: A is the adapter RecordMut type and C is the core record type

fn alloc(&'a mut self, layout: AdapterCoreLayout<M>) -> (A, C)

Allocates underlying buffer and returns a mutable reference RecordMut. Note that calling this function may not call an underlying memory allocation as the record arena may be virtual.

impl<'a, R, M> RecordArena<'a, MultiRowLayout<M>, R> for DenseRecordArena

where [u8]: CustomBorrow<'a, R, MultiRowLayout<M>>, R: SizedRecord<MultiRowLayout<M>>,

RecordArena implementation for DenseRecordArena, with MultiRowLayout NOTE: R is the RecordMut type

fn alloc(&'a mut self, layout: MultiRowLayout<M>) -> R

Allocates underlying buffer and returns a mutable reference RecordMut. Note that calling this function may not call an underlying memory allocation as the record arena may be virtual.

impl SystemChipComplex<DenseRecordArena, GenericGpuBackend<BabyBearPoseidon2HashScheme>> for SystemChipInventoryGPU

fn load_program(&mut self, cached_program_trace: CommittedTraceData<GpuBackend>)

Loads the program in the form of a cached trace with prover data.

fn transport_init_memory_to_device(&mut self, memory: &GuestMemory)

Transport the initial memory state to device. This may be called before preflight execution begins and start async device processes in parallel to execution.

fn generate_proving_ctx( &mut self, system_records: SystemRecords<F>, _record_arenas: Vec<DenseRecordArena>, ) -> Vec<AirProvingContext<GpuBackend>>

The caller must guarantee that record_arenas has length equal to the number of system AIRs, although some arenas may be empty if they are unused.

fn memory_top_tree(&self) -> Option<&[[F; 8]]>

Returns the top merkle sub-tree of the memory merkle tree as a segment tree with 2 * (2^addr_space_height) - 1 nodes, representing the Merkle tree formed from the roots of the sub-trees for each address space.