openvm_sha256_circuit/sha256_chip/
columns.rs1use openvm_circuit::{
4 arch::ExecutionState,
5 system::memory::offline_checker::{MemoryReadAuxCols, MemoryWriteAuxCols},
6};
7use openvm_circuit_primitives::AlignedBorrow;
8use openvm_instructions::riscv::RV32_REGISTER_NUM_LIMBS;
9use openvm_sha256_air::{Sha256DigestCols, Sha256RoundCols};
10
11use super::{SHA256_REGISTER_READS, SHA256_WRITE_SIZE};
12
13#[repr(C)]
16#[derive(Clone, Copy, Debug, AlignedBorrow)]
17pub struct Sha256VmRoundCols<T> {
18 pub control: Sha256VmControlCols<T>,
19 pub inner: Sha256RoundCols<T>,
20 pub read_aux: MemoryReadAuxCols<T>,
21}
22
23#[repr(C)]
24#[derive(Clone, Copy, Debug, AlignedBorrow)]
25pub struct Sha256VmDigestCols<T> {
26 pub control: Sha256VmControlCols<T>,
27 pub inner: Sha256DigestCols<T>,
28
29 pub from_state: ExecutionState<T>,
30 pub rd_ptr: T,
33 pub rs1_ptr: T,
34 pub rs2_ptr: T,
35 pub dst_ptr: [T; RV32_REGISTER_NUM_LIMBS],
36 pub src_ptr: [T; RV32_REGISTER_NUM_LIMBS],
37 pub len_data: [T; RV32_REGISTER_NUM_LIMBS],
38 pub register_reads_aux: [MemoryReadAuxCols<T>; SHA256_REGISTER_READS],
39 pub writes_aux: MemoryWriteAuxCols<T, SHA256_WRITE_SIZE>,
40}
41
42#[repr(C)]
44#[derive(Clone, Copy, Debug, AlignedBorrow)]
45pub struct Sha256VmControlCols<T> {
46 pub len: T,
49 pub cur_timestamp: T,
51 pub read_ptr: T,
52 pub pad_flags: [T; 6],
55 pub padding_occurred: T,
57}
58
59pub const SHA256VM_CONTROL_WIDTH: usize = Sha256VmControlCols::<u8>::width();
61pub const SHA256VM_ROUND_WIDTH: usize = Sha256VmRoundCols::<u8>::width();
63pub const SHA256VM_DIGEST_WIDTH: usize = Sha256VmDigestCols::<u8>::width();
65pub const SHA256VM_WIDTH: usize = if SHA256VM_ROUND_WIDTH > SHA256VM_DIGEST_WIDTH {
67 SHA256VM_ROUND_WIDTH
68} else {
69 SHA256VM_DIGEST_WIDTH
70};