openvm_circuit/system/poseidon2/
mod.rs

1//! Chip to handle **native kernel** instructions for Poseidon2 `compress` and `permute`.
2//! This chip is put in `intrinsics` for organizational convenience, but
3//! it is used as a system chip for the memory merkle tree and as a native kernel chip for
4//! aggregation.
5//!
6//! Note that neither `compress` nor `permute` on its own
7//! is a cryptographic hash. `permute` is a cryptographic permutation, which can be made
8//! into a hash by applying a sponge construction. `compress` can be used as a hash in the
9//! internal leaves of a Merkle tree but **not** as the leaf hash because `compress` does not
10//! add any padding.
11
12use std::sync::Arc;
13
14use openvm_circuit_primitives::Chip;
15use openvm_poseidon2_air::{Poseidon2Config, Poseidon2SubAir};
16use openvm_stark_backend::{interaction::LookupBus, StarkProtocolConfig, Val};
17
18#[cfg(test)]
19pub mod tests;
20
21pub mod air;
22mod chip;
23pub use chip::*;
24
25use crate::{
26    arch::{
27        hasher::{Hasher, HasherChip},
28        AirRefWithColumns, VmField,
29    },
30    system::poseidon2::air::Poseidon2PeripheryAir,
31};
32pub mod columns;
33pub mod trace;
34
35pub const PERIPHERY_POSEIDON2_WIDTH: usize = 16;
36pub const PERIPHERY_POSEIDON2_CHUNK_SIZE: usize = 8;
37
38#[derive(Chip)]
39#[chip(where = "F: VmField")]
40pub enum Poseidon2PeripheryChip<F: VmField> {
41    Register0(Poseidon2PeripheryBaseChip<F, 0>),
42    Register1(Poseidon2PeripheryBaseChip<F, 1>),
43}
44impl<F: VmField> Poseidon2PeripheryChip<F> {
45    pub fn new(poseidon2_config: Poseidon2Config<F>, max_constraint_degree: usize) -> Self {
46        if max_constraint_degree >= 7 {
47            Self::Register0(Poseidon2PeripheryBaseChip::new(poseidon2_config))
48        } else {
49            Self::Register1(Poseidon2PeripheryBaseChip::new(poseidon2_config))
50        }
51    }
52}
53
54pub fn new_poseidon2_periphery_air<SC>(
55    poseidon2_config: Poseidon2Config<Val<SC>>,
56    direct_bus: LookupBus,
57    max_constraint_degree: usize,
58) -> AirRefWithColumns<SC>
59where
60    SC: StarkProtocolConfig,
61    Val<SC>: VmField,
62{
63    if max_constraint_degree >= 7 {
64        Arc::new(Poseidon2PeripheryAir::<Val<SC>, 0>::new(
65            Arc::new(Poseidon2SubAir::new(poseidon2_config.constants.into())),
66            direct_bus,
67        ))
68    } else {
69        Arc::new(Poseidon2PeripheryAir::<Val<SC>, 1>::new(
70            Arc::new(Poseidon2SubAir::new(poseidon2_config.constants.into())),
71            direct_bus,
72        ))
73    }
74}
75
76impl<F: VmField> Hasher<PERIPHERY_POSEIDON2_CHUNK_SIZE, F> for Poseidon2PeripheryChip<F> {
77    fn compress(
78        &self,
79        lhs: &[F; PERIPHERY_POSEIDON2_CHUNK_SIZE],
80        rhs: &[F; PERIPHERY_POSEIDON2_CHUNK_SIZE],
81    ) -> [F; PERIPHERY_POSEIDON2_CHUNK_SIZE] {
82        match self {
83            Poseidon2PeripheryChip::Register0(chip) => chip.compress(lhs, rhs),
84            Poseidon2PeripheryChip::Register1(chip) => chip.compress(lhs, rhs),
85        }
86    }
87}
88
89impl<F: VmField> HasherChip<PERIPHERY_POSEIDON2_CHUNK_SIZE, F> for Poseidon2PeripheryChip<F> {
90    fn compress_and_record(
91        &self,
92        lhs: &[F; PERIPHERY_POSEIDON2_CHUNK_SIZE],
93        rhs: &[F; PERIPHERY_POSEIDON2_CHUNK_SIZE],
94    ) -> [F; PERIPHERY_POSEIDON2_CHUNK_SIZE] {
95        match self {
96            Poseidon2PeripheryChip::Register0(chip) => chip.compress_and_record(lhs, rhs),
97            Poseidon2PeripheryChip::Register1(chip) => chip.compress_and_record(lhs, rhs),
98        }
99    }
100}