1#![cfg_attr(feature = "tco", allow(incomplete_features))]
2#![cfg_attr(feature = "tco", feature(explicit_tail_calls))]
3#![cfg_attr(feature = "tco", allow(internal_features))]
4#![cfg_attr(feature = "tco", feature(core_intrinsics))]
5use openvm_circuit::{
6 self,
7 arch::{InitFileGenerator, SystemConfig, VmAirWrapper, VmChipWrapper},
8 system::SystemExecutor,
9};
10use openvm_circuit_derive::{PreflightExecutor, VmConfig};
11use openvm_rv32_adapters::{
12 Rv32HeapAdapterAir, Rv32HeapAdapterExecutor, Rv32HeapAdapterFiller, Rv32HeapBranchAdapterAir,
13 Rv32HeapBranchAdapterExecutor, Rv32HeapBranchAdapterFiller,
14};
15use openvm_rv32im_circuit::{
16 adapters::{INT256_NUM_LIMBS, RV32_CELL_BITS},
17 BaseAluCoreAir, BaseAluExecutor, BaseAluFiller, BranchEqualCoreAir, BranchEqualExecutor,
18 BranchEqualFiller, BranchLessThanCoreAir, BranchLessThanExecutor, BranchLessThanFiller,
19 LessThanCoreAir, LessThanExecutor, LessThanFiller, MultiplicationCoreAir,
20 MultiplicationExecutor, MultiplicationFiller, Rv32I, Rv32IExecutor, Rv32Io, Rv32IoExecutor,
21 Rv32M, Rv32MExecutor, ShiftCoreAir, ShiftExecutor, ShiftFiller,
22};
23use serde::{Deserialize, Serialize};
24
25mod extension;
26pub use extension::*;
27
28mod base_alu;
29mod branch_eq;
30mod branch_lt;
31pub(crate) mod common;
32mod less_than;
33mod mult;
34mod shift;
35
36#[cfg(feature = "cuda")]
37mod cuda;
38#[cfg(feature = "cuda")]
39pub use cuda::*;
40
41#[cfg(test)]
42mod tests;
43
44pub type Rv32BaseAlu256Air = VmAirWrapper<
46 Rv32HeapAdapterAir<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
47 BaseAluCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>,
48>;
49#[derive(Clone, PreflightExecutor)]
50pub struct Rv32BaseAlu256Executor(
51 BaseAluExecutor<
52 Rv32HeapAdapterExecutor<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
53 INT256_NUM_LIMBS,
54 RV32_CELL_BITS,
55 >,
56);
57pub type Rv32BaseAlu256Chip<F> = VmChipWrapper<
58 F,
59 BaseAluFiller<
60 Rv32HeapAdapterFiller<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
61 INT256_NUM_LIMBS,
62 RV32_CELL_BITS,
63 >,
64>;
65
66pub type Rv32LessThan256Air = VmAirWrapper<
68 Rv32HeapAdapterAir<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
69 LessThanCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>,
70>;
71#[derive(Clone, PreflightExecutor)]
72pub struct Rv32LessThan256Executor(
73 LessThanExecutor<
74 Rv32HeapAdapterExecutor<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
75 INT256_NUM_LIMBS,
76 RV32_CELL_BITS,
77 >,
78);
79pub type Rv32LessThan256Chip<F> = VmChipWrapper<
80 F,
81 LessThanFiller<
82 Rv32HeapAdapterFiller<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
83 INT256_NUM_LIMBS,
84 RV32_CELL_BITS,
85 >,
86>;
87
88pub type Rv32Multiplication256Air = VmAirWrapper<
90 Rv32HeapAdapterAir<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
91 MultiplicationCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>,
92>;
93#[derive(Clone, PreflightExecutor)]
94pub struct Rv32Multiplication256Executor(
95 MultiplicationExecutor<
96 Rv32HeapAdapterExecutor<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
97 INT256_NUM_LIMBS,
98 RV32_CELL_BITS,
99 >,
100);
101pub type Rv32Multiplication256Chip<F> = VmChipWrapper<
102 F,
103 MultiplicationFiller<
104 Rv32HeapAdapterFiller<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
105 INT256_NUM_LIMBS,
106 RV32_CELL_BITS,
107 >,
108>;
109
110pub type Rv32Shift256Air = VmAirWrapper<
112 Rv32HeapAdapterAir<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
113 ShiftCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>,
114>;
115#[derive(Clone, PreflightExecutor)]
116pub struct Rv32Shift256Executor(
117 ShiftExecutor<
118 Rv32HeapAdapterExecutor<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
119 INT256_NUM_LIMBS,
120 RV32_CELL_BITS,
121 >,
122);
123pub type Rv32Shift256Chip<F> = VmChipWrapper<
124 F,
125 ShiftFiller<
126 Rv32HeapAdapterFiller<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
127 INT256_NUM_LIMBS,
128 RV32_CELL_BITS,
129 >,
130>;
131
132pub type Rv32BranchEqual256Air = VmAirWrapper<
134 Rv32HeapBranchAdapterAir<2, INT256_NUM_LIMBS>,
135 BranchEqualCoreAir<INT256_NUM_LIMBS>,
136>;
137#[derive(Clone, PreflightExecutor)]
138pub struct Rv32BranchEqual256Executor(
139 BranchEqualExecutor<Rv32HeapBranchAdapterExecutor<2, INT256_NUM_LIMBS>, INT256_NUM_LIMBS>,
140);
141pub type Rv32BranchEqual256Chip<F> = VmChipWrapper<
142 F,
143 BranchEqualFiller<Rv32HeapBranchAdapterFiller<2, INT256_NUM_LIMBS>, INT256_NUM_LIMBS>,
144>;
145
146pub type Rv32BranchLessThan256Air = VmAirWrapper<
148 Rv32HeapBranchAdapterAir<2, INT256_NUM_LIMBS>,
149 BranchLessThanCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>,
150>;
151#[derive(Clone, PreflightExecutor)]
152pub struct Rv32BranchLessThan256Executor(
153 BranchLessThanExecutor<
154 Rv32HeapBranchAdapterExecutor<2, INT256_NUM_LIMBS>,
155 INT256_NUM_LIMBS,
156 RV32_CELL_BITS,
157 >,
158);
159pub type Rv32BranchLessThan256Chip<F> = VmChipWrapper<
160 F,
161 BranchLessThanFiller<
162 Rv32HeapBranchAdapterFiller<2, INT256_NUM_LIMBS>,
163 INT256_NUM_LIMBS,
164 RV32_CELL_BITS,
165 >,
166>;
167
168#[derive(Clone, Debug, VmConfig, derive_new::new, Serialize, Deserialize)]
169pub struct Int256Rv32Config {
170 #[config(executor = "SystemExecutor<F>")]
171 pub system: SystemConfig,
172 #[extension]
173 pub rv32i: Rv32I,
174 #[extension]
175 pub rv32m: Rv32M,
176 #[extension]
177 pub io: Rv32Io,
178 #[extension]
179 pub bigint: Int256,
180}
181
182impl InitFileGenerator for Int256Rv32Config {}
184
185impl Default for Int256Rv32Config {
186 fn default() -> Self {
187 Self {
188 system: SystemConfig::default(),
189 rv32i: Rv32I,
190 rv32m: Rv32M::default(),
191 io: Rv32Io,
192 bigint: Int256::default(),
193 }
194 }
195}