1#![cfg_attr(feature = "tco", allow(incomplete_features))]
2#![cfg_attr(feature = "tco", feature(explicit_tail_calls))]
3#![cfg_attr(feature = "tco", feature(core_intrinsics))]
4use openvm_circuit::{
5 self,
6 arch::{InitFileGenerator, SystemConfig, VmAirWrapper, VmChipWrapper},
7 system::SystemExecutor,
8};
9use openvm_circuit_derive::{PreflightExecutor, VmConfig};
10use openvm_rv32_adapters::{
11 Rv32HeapAdapterAir, Rv32HeapAdapterExecutor, Rv32HeapAdapterFiller, Rv32HeapBranchAdapterAir,
12 Rv32HeapBranchAdapterExecutor, Rv32HeapBranchAdapterFiller,
13};
14use openvm_rv32im_circuit::{
15 adapters::{INT256_NUM_LIMBS, RV32_CELL_BITS},
16 BaseAluCoreAir, BaseAluExecutor, BaseAluFiller, BranchEqualCoreAir, BranchEqualExecutor,
17 BranchEqualFiller, BranchLessThanCoreAir, BranchLessThanExecutor, BranchLessThanFiller,
18 LessThanCoreAir, LessThanExecutor, LessThanFiller, MultiplicationCoreAir,
19 MultiplicationExecutor, MultiplicationFiller, Rv32I, Rv32IExecutor, Rv32Io, Rv32IoExecutor,
20 Rv32M, Rv32MExecutor, ShiftCoreAir, ShiftExecutor, ShiftFiller,
21};
22use serde::{Deserialize, Serialize};
23
24mod extension;
25pub use extension::*;
26
27mod base_alu;
28mod branch_eq;
29mod branch_lt;
30pub(crate) mod common;
31mod less_than;
32mod mult;
33mod shift;
34
35#[cfg(feature = "cuda")]
36mod cuda;
37#[cfg(feature = "cuda")]
38pub use cuda::*;
39
40#[cfg(test)]
41mod tests;
42
43pub type Rv32BaseAlu256Air = VmAirWrapper<
45 Rv32HeapAdapterAir<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
46 BaseAluCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>,
47>;
48#[derive(Clone, PreflightExecutor)]
49pub struct Rv32BaseAlu256Executor(
50 BaseAluExecutor<
51 Rv32HeapAdapterExecutor<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
52 INT256_NUM_LIMBS,
53 RV32_CELL_BITS,
54 >,
55);
56pub type Rv32BaseAlu256Chip<F> = VmChipWrapper<
57 F,
58 BaseAluFiller<
59 Rv32HeapAdapterFiller<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
60 INT256_NUM_LIMBS,
61 RV32_CELL_BITS,
62 >,
63>;
64
65pub type Rv32LessThan256Air = VmAirWrapper<
67 Rv32HeapAdapterAir<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
68 LessThanCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>,
69>;
70#[derive(Clone, PreflightExecutor)]
71pub struct Rv32LessThan256Executor(
72 LessThanExecutor<
73 Rv32HeapAdapterExecutor<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
74 INT256_NUM_LIMBS,
75 RV32_CELL_BITS,
76 >,
77);
78pub type Rv32LessThan256Chip<F> = VmChipWrapper<
79 F,
80 LessThanFiller<
81 Rv32HeapAdapterFiller<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
82 INT256_NUM_LIMBS,
83 RV32_CELL_BITS,
84 >,
85>;
86
87pub type Rv32Multiplication256Air = VmAirWrapper<
89 Rv32HeapAdapterAir<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
90 MultiplicationCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>,
91>;
92#[derive(Clone, PreflightExecutor)]
93pub struct Rv32Multiplication256Executor(
94 MultiplicationExecutor<
95 Rv32HeapAdapterExecutor<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
96 INT256_NUM_LIMBS,
97 RV32_CELL_BITS,
98 >,
99);
100pub type Rv32Multiplication256Chip<F> = VmChipWrapper<
101 F,
102 MultiplicationFiller<
103 Rv32HeapAdapterFiller<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
104 INT256_NUM_LIMBS,
105 RV32_CELL_BITS,
106 >,
107>;
108
109pub type Rv32Shift256Air = VmAirWrapper<
111 Rv32HeapAdapterAir<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
112 ShiftCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>,
113>;
114#[derive(Clone, PreflightExecutor)]
115pub struct Rv32Shift256Executor(
116 ShiftExecutor<
117 Rv32HeapAdapterExecutor<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
118 INT256_NUM_LIMBS,
119 RV32_CELL_BITS,
120 >,
121);
122pub type Rv32Shift256Chip<F> = VmChipWrapper<
123 F,
124 ShiftFiller<
125 Rv32HeapAdapterFiller<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
126 INT256_NUM_LIMBS,
127 RV32_CELL_BITS,
128 >,
129>;
130
131pub type Rv32BranchEqual256Air = VmAirWrapper<
133 Rv32HeapBranchAdapterAir<2, INT256_NUM_LIMBS>,
134 BranchEqualCoreAir<INT256_NUM_LIMBS>,
135>;
136#[derive(Clone, PreflightExecutor)]
137pub struct Rv32BranchEqual256Executor(
138 BranchEqualExecutor<Rv32HeapBranchAdapterExecutor<2, INT256_NUM_LIMBS>, INT256_NUM_LIMBS>,
139);
140pub type Rv32BranchEqual256Chip<F> = VmChipWrapper<
141 F,
142 BranchEqualFiller<Rv32HeapBranchAdapterFiller<2, INT256_NUM_LIMBS>, INT256_NUM_LIMBS>,
143>;
144
145pub type Rv32BranchLessThan256Air = VmAirWrapper<
147 Rv32HeapBranchAdapterAir<2, INT256_NUM_LIMBS>,
148 BranchLessThanCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>,
149>;
150#[derive(Clone, PreflightExecutor)]
151pub struct Rv32BranchLessThan256Executor(
152 BranchLessThanExecutor<
153 Rv32HeapBranchAdapterExecutor<2, INT256_NUM_LIMBS>,
154 INT256_NUM_LIMBS,
155 RV32_CELL_BITS,
156 >,
157);
158pub type Rv32BranchLessThan256Chip<F> = VmChipWrapper<
159 F,
160 BranchLessThanFiller<
161 Rv32HeapBranchAdapterFiller<2, INT256_NUM_LIMBS>,
162 INT256_NUM_LIMBS,
163 RV32_CELL_BITS,
164 >,
165>;
166
167#[derive(Clone, Debug, VmConfig, derive_new::new, Serialize, Deserialize)]
168pub struct Int256Rv32Config {
169 #[config(executor = "SystemExecutor<F>")]
170 pub system: SystemConfig,
171 #[extension]
172 pub rv32i: Rv32I,
173 #[extension]
174 pub rv32m: Rv32M,
175 #[extension]
176 pub io: Rv32Io,
177 #[extension]
178 pub bigint: Int256,
179}
180
181impl InitFileGenerator for Int256Rv32Config {}
183
184impl Default for Int256Rv32Config {
185 fn default() -> Self {
186 Self {
187 system: SystemConfig::default(),
188 rv32i: Rv32I,
189 rv32m: Rv32M::default(),
190 io: Rv32Io,
191 bigint: Int256::default(),
192 }
193 }
194}