1#![cfg_attr(feature = "tco", allow(incomplete_features))]
2#![cfg_attr(feature = "tco", feature(explicit_tail_calls))]
3use openvm_circuit::{
4 self,
5 arch::{InitFileGenerator, SystemConfig, VmAirWrapper, VmChipWrapper},
6 system::SystemExecutor,
7};
8use openvm_circuit_derive::{PreflightExecutor, VmConfig};
9use openvm_rv32_adapters::{
10 Rv32HeapAdapterAir, Rv32HeapAdapterExecutor, Rv32HeapAdapterFiller, Rv32HeapBranchAdapterAir,
11 Rv32HeapBranchAdapterExecutor, Rv32HeapBranchAdapterFiller,
12};
13use openvm_rv32im_circuit::{
14 adapters::{INT256_NUM_LIMBS, RV32_CELL_BITS},
15 BaseAluCoreAir, BaseAluExecutor, BaseAluFiller, BranchEqualCoreAir, BranchEqualExecutor,
16 BranchEqualFiller, BranchLessThanCoreAir, BranchLessThanExecutor, BranchLessThanFiller,
17 LessThanCoreAir, LessThanExecutor, LessThanFiller, MultiplicationCoreAir,
18 MultiplicationExecutor, MultiplicationFiller, Rv32I, Rv32IExecutor, Rv32Io, Rv32IoExecutor,
19 Rv32M, Rv32MExecutor, ShiftCoreAir, ShiftExecutor, ShiftFiller,
20};
21use serde::{Deserialize, Serialize};
22
23mod extension;
24pub use extension::*;
25
26mod base_alu;
27mod branch_eq;
28mod branch_lt;
29pub(crate) mod common;
30mod less_than;
31mod mult;
32mod shift;
33
34#[cfg(feature = "cuda")]
35mod cuda;
36#[cfg(feature = "cuda")]
37pub use cuda::*;
38
39#[cfg(test)]
40mod tests;
41
42pub type Rv32BaseAlu256Air = VmAirWrapper<
44 Rv32HeapAdapterAir<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
45 BaseAluCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>,
46>;
47#[derive(Clone, PreflightExecutor)]
48pub struct Rv32BaseAlu256Executor(
49 BaseAluExecutor<
50 Rv32HeapAdapterExecutor<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
51 INT256_NUM_LIMBS,
52 RV32_CELL_BITS,
53 >,
54);
55pub type Rv32BaseAlu256Chip<F> = VmChipWrapper<
56 F,
57 BaseAluFiller<
58 Rv32HeapAdapterFiller<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
59 INT256_NUM_LIMBS,
60 RV32_CELL_BITS,
61 >,
62>;
63
64pub type Rv32LessThan256Air = VmAirWrapper<
66 Rv32HeapAdapterAir<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
67 LessThanCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>,
68>;
69#[derive(Clone, PreflightExecutor)]
70pub struct Rv32LessThan256Executor(
71 LessThanExecutor<
72 Rv32HeapAdapterExecutor<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
73 INT256_NUM_LIMBS,
74 RV32_CELL_BITS,
75 >,
76);
77pub type Rv32LessThan256Chip<F> = VmChipWrapper<
78 F,
79 LessThanFiller<
80 Rv32HeapAdapterFiller<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
81 INT256_NUM_LIMBS,
82 RV32_CELL_BITS,
83 >,
84>;
85
86pub type Rv32Multiplication256Air = VmAirWrapper<
88 Rv32HeapAdapterAir<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
89 MultiplicationCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>,
90>;
91#[derive(Clone, PreflightExecutor)]
92pub struct Rv32Multiplication256Executor(
93 MultiplicationExecutor<
94 Rv32HeapAdapterExecutor<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
95 INT256_NUM_LIMBS,
96 RV32_CELL_BITS,
97 >,
98);
99pub type Rv32Multiplication256Chip<F> = VmChipWrapper<
100 F,
101 MultiplicationFiller<
102 Rv32HeapAdapterFiller<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
103 INT256_NUM_LIMBS,
104 RV32_CELL_BITS,
105 >,
106>;
107
108pub type Rv32Shift256Air = VmAirWrapper<
110 Rv32HeapAdapterAir<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
111 ShiftCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>,
112>;
113#[derive(Clone, PreflightExecutor)]
114pub struct Rv32Shift256Executor(
115 ShiftExecutor<
116 Rv32HeapAdapterExecutor<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
117 INT256_NUM_LIMBS,
118 RV32_CELL_BITS,
119 >,
120);
121pub type Rv32Shift256Chip<F> = VmChipWrapper<
122 F,
123 ShiftFiller<
124 Rv32HeapAdapterFiller<2, INT256_NUM_LIMBS, INT256_NUM_LIMBS>,
125 INT256_NUM_LIMBS,
126 RV32_CELL_BITS,
127 >,
128>;
129
130pub type Rv32BranchEqual256Air = VmAirWrapper<
132 Rv32HeapBranchAdapterAir<2, INT256_NUM_LIMBS>,
133 BranchEqualCoreAir<INT256_NUM_LIMBS>,
134>;
135#[derive(Clone, PreflightExecutor)]
136pub struct Rv32BranchEqual256Executor(
137 BranchEqualExecutor<Rv32HeapBranchAdapterExecutor<2, INT256_NUM_LIMBS>, INT256_NUM_LIMBS>,
138);
139pub type Rv32BranchEqual256Chip<F> = VmChipWrapper<
140 F,
141 BranchEqualFiller<Rv32HeapBranchAdapterFiller<2, INT256_NUM_LIMBS>, INT256_NUM_LIMBS>,
142>;
143
144pub type Rv32BranchLessThan256Air = VmAirWrapper<
146 Rv32HeapBranchAdapterAir<2, INT256_NUM_LIMBS>,
147 BranchLessThanCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>,
148>;
149#[derive(Clone, PreflightExecutor)]
150pub struct Rv32BranchLessThan256Executor(
151 BranchLessThanExecutor<
152 Rv32HeapBranchAdapterExecutor<2, INT256_NUM_LIMBS>,
153 INT256_NUM_LIMBS,
154 RV32_CELL_BITS,
155 >,
156);
157pub type Rv32BranchLessThan256Chip<F> = VmChipWrapper<
158 F,
159 BranchLessThanFiller<
160 Rv32HeapBranchAdapterFiller<2, INT256_NUM_LIMBS>,
161 INT256_NUM_LIMBS,
162 RV32_CELL_BITS,
163 >,
164>;
165
166#[derive(Clone, Debug, VmConfig, derive_new::new, Serialize, Deserialize)]
167pub struct Int256Rv32Config {
168 #[config(executor = "SystemExecutor<F>")]
169 pub system: SystemConfig,
170 #[extension]
171 pub rv32i: Rv32I,
172 #[extension]
173 pub rv32m: Rv32M,
174 #[extension]
175 pub io: Rv32Io,
176 #[extension]
177 pub bigint: Int256,
178}
179
180impl InitFileGenerator for Int256Rv32Config {}
182
183impl Default for Int256Rv32Config {
184 fn default() -> Self {
185 Self {
186 system: SystemConfig::default(),
187 rv32i: Rv32I,
188 rv32m: Rv32M::default(),
189 io: Rv32Io,
190 bigint: Int256::default(),
191 }
192 }
193}