openvm_bigint_circuit/
lib.rs

1#![cfg_attr(feature = "tco", allow(incomplete_features))]
2#![cfg_attr(feature = "tco", feature(explicit_tail_calls))]
3#![cfg_attr(feature = "tco", allow(internal_features))]
4#![cfg_attr(feature = "tco", feature(core_intrinsics))]
5use openvm_circuit::{
6    self,
7    arch::{InitFileGenerator, SystemConfig, VmAirWrapper, VmChipWrapper, DEFAULT_BLOCK_SIZE},
8    system::SystemExecutor,
9};
10use openvm_circuit_derive::{PreflightExecutor, VmConfig};
11use openvm_rv32_adapters::{
12    Rv32VecHeapAdapterAir, Rv32VecHeapAdapterExecutor, Rv32VecHeapAdapterFiller,
13    Rv32VecHeapBranchAdapterAir, Rv32VecHeapBranchAdapterExecutor, Rv32VecHeapBranchAdapterFiller,
14    VecToFlatAluAdapterAir, VecToFlatAluAdapterExecutor, VecToFlatBranchAdapterAir,
15    VecToFlatBranchAdapterExecutor,
16};
17use openvm_rv32im_circuit::{
18    adapters::{INT256_NUM_LIMBS, RV32_CELL_BITS},
19    BaseAluCoreAir, BaseAluExecutor, BaseAluFiller, BranchEqualCoreAir, BranchEqualExecutor,
20    BranchEqualFiller, BranchLessThanCoreAir, BranchLessThanExecutor, BranchLessThanFiller,
21    LessThanCoreAir, LessThanExecutor, LessThanFiller, MultiplicationCoreAir,
22    MultiplicationExecutor, MultiplicationFiller, Rv32I, Rv32IExecutor, Rv32Io, Rv32IoExecutor,
23    Rv32M, Rv32MExecutor, ShiftCoreAir, ShiftExecutor, ShiftFiller,
24};
25use serde::{Deserialize, Serialize};
26
27mod extension;
28pub use extension::*;
29
30mod base_alu;
31mod branch_eq;
32mod branch_lt;
33pub(crate) mod common;
34mod less_than;
35mod mult;
36mod shift;
37
38#[cfg(feature = "cuda")]
39mod cuda;
40#[cfg(feature = "cuda")]
41pub use cuda::*;
42
43#[cfg(test)]
44mod tests;
45
46/// Number of blocks for INT256 operations (INT256_NUM_LIMBS / DEFAULT_BLOCK_SIZE)
47pub const INT256_NUM_BLOCKS: usize = INT256_NUM_LIMBS / DEFAULT_BLOCK_SIZE;
48
49/// Type alias for the ALU adapter AIR wrapper
50type AluAdapterAir = VecToFlatAluAdapterAir<
51    Rv32VecHeapAdapterAir<
52        2,
53        INT256_NUM_BLOCKS,
54        INT256_NUM_BLOCKS,
55        DEFAULT_BLOCK_SIZE,
56        DEFAULT_BLOCK_SIZE,
57    >,
58    2,
59    INT256_NUM_BLOCKS,
60    INT256_NUM_BLOCKS,
61    DEFAULT_BLOCK_SIZE,
62    INT256_NUM_LIMBS,
63    INT256_NUM_LIMBS,
64>;
65
66/// Type alias for the ALU adapter executor wrapper
67type AluAdapterExecutor = VecToFlatAluAdapterExecutor<
68    Rv32VecHeapAdapterExecutor<
69        2,
70        INT256_NUM_BLOCKS,
71        INT256_NUM_BLOCKS,
72        DEFAULT_BLOCK_SIZE,
73        DEFAULT_BLOCK_SIZE,
74    >,
75    2,
76    INT256_NUM_BLOCKS,
77    INT256_NUM_BLOCKS,
78    DEFAULT_BLOCK_SIZE,
79    INT256_NUM_LIMBS,
80    INT256_NUM_LIMBS,
81>;
82
83/// Type alias for the Branch adapter AIR wrapper
84type BranchAdapterAir = VecToFlatBranchAdapterAir<
85    Rv32VecHeapBranchAdapterAir<2, INT256_NUM_BLOCKS, DEFAULT_BLOCK_SIZE>,
86    2,
87    INT256_NUM_BLOCKS,
88    DEFAULT_BLOCK_SIZE,
89    INT256_NUM_LIMBS,
90>;
91
92/// Type alias for the Branch adapter executor wrapper
93type BranchAdapterExecutor = VecToFlatBranchAdapterExecutor<
94    Rv32VecHeapBranchAdapterExecutor<2, INT256_NUM_BLOCKS, DEFAULT_BLOCK_SIZE>,
95    2,
96    INT256_NUM_BLOCKS,
97    DEFAULT_BLOCK_SIZE,
98    INT256_NUM_LIMBS,
99>;
100
101/// BaseAlu256
102pub type Rv32BaseAlu256Air =
103    VmAirWrapper<AluAdapterAir, BaseAluCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>>;
104#[derive(Clone, PreflightExecutor)]
105pub struct Rv32BaseAlu256Executor(
106    BaseAluExecutor<AluAdapterExecutor, INT256_NUM_LIMBS, RV32_CELL_BITS>,
107);
108pub type Rv32BaseAlu256Chip<F> = VmChipWrapper<
109    F,
110    BaseAluFiller<
111        Rv32VecHeapAdapterFiller<
112            2,
113            INT256_NUM_BLOCKS,
114            INT256_NUM_BLOCKS,
115            DEFAULT_BLOCK_SIZE,
116            DEFAULT_BLOCK_SIZE,
117        >,
118        INT256_NUM_LIMBS,
119        RV32_CELL_BITS,
120    >,
121>;
122
123/// LessThan256
124pub type Rv32LessThan256Air =
125    VmAirWrapper<AluAdapterAir, LessThanCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>>;
126#[derive(Clone, PreflightExecutor)]
127pub struct Rv32LessThan256Executor(
128    LessThanExecutor<AluAdapterExecutor, INT256_NUM_LIMBS, RV32_CELL_BITS>,
129);
130pub type Rv32LessThan256Chip<F> = VmChipWrapper<
131    F,
132    LessThanFiller<
133        Rv32VecHeapAdapterFiller<
134            2,
135            INT256_NUM_BLOCKS,
136            INT256_NUM_BLOCKS,
137            DEFAULT_BLOCK_SIZE,
138            DEFAULT_BLOCK_SIZE,
139        >,
140        INT256_NUM_LIMBS,
141        RV32_CELL_BITS,
142    >,
143>;
144
145/// Multiplication256
146pub type Rv32Multiplication256Air =
147    VmAirWrapper<AluAdapterAir, MultiplicationCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>>;
148#[derive(Clone, PreflightExecutor)]
149pub struct Rv32Multiplication256Executor(
150    MultiplicationExecutor<AluAdapterExecutor, INT256_NUM_LIMBS, RV32_CELL_BITS>,
151);
152pub type Rv32Multiplication256Chip<F> = VmChipWrapper<
153    F,
154    MultiplicationFiller<
155        Rv32VecHeapAdapterFiller<
156            2,
157            INT256_NUM_BLOCKS,
158            INT256_NUM_BLOCKS,
159            DEFAULT_BLOCK_SIZE,
160            DEFAULT_BLOCK_SIZE,
161        >,
162        INT256_NUM_LIMBS,
163        RV32_CELL_BITS,
164    >,
165>;
166
167/// Shift256
168pub type Rv32Shift256Air =
169    VmAirWrapper<AluAdapterAir, ShiftCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>>;
170#[derive(Clone, PreflightExecutor)]
171pub struct Rv32Shift256Executor(
172    ShiftExecutor<AluAdapterExecutor, INT256_NUM_LIMBS, RV32_CELL_BITS>,
173);
174pub type Rv32Shift256Chip<F> = VmChipWrapper<
175    F,
176    ShiftFiller<
177        Rv32VecHeapAdapterFiller<
178            2,
179            INT256_NUM_BLOCKS,
180            INT256_NUM_BLOCKS,
181            DEFAULT_BLOCK_SIZE,
182            DEFAULT_BLOCK_SIZE,
183        >,
184        INT256_NUM_LIMBS,
185        RV32_CELL_BITS,
186    >,
187>;
188
189/// BranchEqual256
190pub type Rv32BranchEqual256Air =
191    VmAirWrapper<BranchAdapterAir, BranchEqualCoreAir<INT256_NUM_LIMBS>>;
192#[derive(Clone, PreflightExecutor)]
193pub struct Rv32BranchEqual256Executor(BranchEqualExecutor<BranchAdapterExecutor, INT256_NUM_LIMBS>);
194pub type Rv32BranchEqual256Chip<F> = VmChipWrapper<
195    F,
196    BranchEqualFiller<
197        Rv32VecHeapBranchAdapterFiller<2, INT256_NUM_BLOCKS, DEFAULT_BLOCK_SIZE>,
198        INT256_NUM_LIMBS,
199    >,
200>;
201
202/// BranchLessThan256
203pub type Rv32BranchLessThan256Air =
204    VmAirWrapper<BranchAdapterAir, BranchLessThanCoreAir<INT256_NUM_LIMBS, RV32_CELL_BITS>>;
205#[derive(Clone, PreflightExecutor)]
206pub struct Rv32BranchLessThan256Executor(
207    BranchLessThanExecutor<BranchAdapterExecutor, INT256_NUM_LIMBS, RV32_CELL_BITS>,
208);
209pub type Rv32BranchLessThan256Chip<F> = VmChipWrapper<
210    F,
211    BranchLessThanFiller<
212        Rv32VecHeapBranchAdapterFiller<2, INT256_NUM_BLOCKS, DEFAULT_BLOCK_SIZE>,
213        INT256_NUM_LIMBS,
214        RV32_CELL_BITS,
215    >,
216>;
217
218#[derive(Clone, Debug, VmConfig, derive_new::new, Serialize, Deserialize)]
219pub struct Int256Rv32Config {
220    #[config(executor = "SystemExecutor<F>")]
221    pub system: SystemConfig,
222    #[extension]
223    pub rv32i: Rv32I,
224    #[extension]
225    pub rv32m: Rv32M,
226    #[extension]
227    pub io: Rv32Io,
228    #[extension]
229    pub bigint: Int256,
230}
231
232// Default implementation uses no init file
233impl InitFileGenerator for Int256Rv32Config {}
234
235impl Default for Int256Rv32Config {
236    fn default() -> Self {
237        Self {
238            system: SystemConfig::default(),
239            rv32i: Rv32I,
240            rv32m: Rv32M::default(),
241            io: Rv32Io,
242            bigint: Int256::default(),
243        }
244    }
245}
openvm_bigint_circuit/lib.rs

openvm_bigint_circuit/
lib.rs
