openvm_algebra_circuit/
lib.rs

1#![cfg_attr(feature = "tco", allow(incomplete_features))]
2#![cfg_attr(feature = "tco", feature(explicit_tail_calls))]
3#![cfg_attr(feature = "tco", allow(internal_features))]
4#![cfg_attr(feature = "tco", feature(core_intrinsics))]
5
6use derive_more::derive::{Deref, DerefMut};
7use openvm_circuit_derive::PreflightExecutor;
8use openvm_mod_circuit_builder::FieldExpressionExecutor;
9use openvm_rv32_adapters::Rv32VecHeapAdapterExecutor;
10#[cfg(feature = "cuda")]
11use {
12    openvm_mod_circuit_builder::FieldExpressionCoreRecordMut,
13    openvm_rv32_adapters::Rv32VecHeapAdapterRecord,
14};
15
16pub mod fp2_chip;
17pub mod modular_chip;
18
19mod execution;
20mod fp2;
21pub use fp2::*;
22mod extension;
23pub use extension::*;
24pub mod fields;
25
26#[derive(Clone, PreflightExecutor, Deref, DerefMut)]
27pub struct FieldExprVecHeapExecutor<
28    const BLOCKS: usize,
29    const BLOCK_SIZE: usize,
30    const IS_FP2: bool,
31>(FieldExpressionExecutor<Rv32VecHeapAdapterExecutor<2, BLOCKS, BLOCKS, BLOCK_SIZE, BLOCK_SIZE>>);
32
33#[cfg(feature = "cuda")]
34pub(crate) type AlgebraRecord<
35    'a,
36    const NUM_READS: usize,
37    const BLOCKS: usize,
38    const BLOCK_SIZE: usize,
39> = (
40    &'a mut Rv32VecHeapAdapterRecord<NUM_READS, BLOCKS, BLOCKS, BLOCK_SIZE, BLOCK_SIZE>,
41    FieldExpressionCoreRecordMut<'a>,
42);
openvm_algebra_circuit/lib.rs

openvm_algebra_circuit/
lib.rs
