openvm_algebra_circuit/
lib.rs

1#![cfg_attr(feature = "tco", allow(incomplete_features))]
2#![cfg_attr(feature = "tco", feature(explicit_tail_calls))]
3
4use derive_more::derive::{Deref, DerefMut};
5use openvm_circuit_derive::PreflightExecutor;
6use openvm_mod_circuit_builder::FieldExpressionExecutor;
7use openvm_rv32_adapters::Rv32VecHeapAdapterExecutor;
8#[cfg(feature = "cuda")]
9use {
10    openvm_mod_circuit_builder::FieldExpressionCoreRecordMut,
11    openvm_rv32_adapters::Rv32VecHeapAdapterRecord,
12};
13
14pub mod fp2_chip;
15pub mod modular_chip;
16
17mod execution;
18mod fp2;
19pub use fp2::*;
20mod extension;
21pub use extension::*;
22pub mod fields;
23
24#[derive(Clone, PreflightExecutor, Deref, DerefMut)]
25pub struct FieldExprVecHeapExecutor<
26    const BLOCKS: usize,
27    const BLOCK_SIZE: usize,
28    const IS_FP2: bool,
29>(FieldExpressionExecutor<Rv32VecHeapAdapterExecutor<2, BLOCKS, BLOCKS, BLOCK_SIZE, BLOCK_SIZE>>);
30
31#[cfg(feature = "cuda")]
32pub(crate) type AlgebraRecord<
33    'a,
34    const NUM_READS: usize,
35    const BLOCKS: usize,
36    const BLOCK_SIZE: usize,
37> = (
38    &'a mut Rv32VecHeapAdapterRecord<NUM_READS, BLOCKS, BLOCKS, BLOCK_SIZE, BLOCK_SIZE>,
39    FieldExpressionCoreRecordMut<'a>,
40);
openvm_algebra_circuit/lib.rs

openvm_algebra_circuit/
lib.rs
