openvm_algebra_circuit/
lib.rs

1#![cfg_attr(feature = "tco", allow(incomplete_features))]
2#![cfg_attr(feature = "tco", feature(explicit_tail_calls))]
3#![cfg_attr(feature = "tco", feature(core_intrinsics))]
4
5use derive_more::derive::{Deref, DerefMut};
6use openvm_circuit_derive::PreflightExecutor;
7use openvm_mod_circuit_builder::FieldExpressionExecutor;
8use openvm_rv32_adapters::Rv32VecHeapAdapterExecutor;
9#[cfg(feature = "cuda")]
10use {
11    openvm_mod_circuit_builder::FieldExpressionCoreRecordMut,
12    openvm_rv32_adapters::Rv32VecHeapAdapterRecord,
13};
14
15pub mod fp2_chip;
16pub mod modular_chip;
17
18mod execution;
19mod fp2;
20pub use fp2::*;
21mod extension;
22pub use extension::*;
23pub mod fields;
24
25#[derive(Clone, PreflightExecutor, Deref, DerefMut)]
26pub struct FieldExprVecHeapExecutor<
27    const BLOCKS: usize,
28    const BLOCK_SIZE: usize,
29    const IS_FP2: bool,
30>(FieldExpressionExecutor<Rv32VecHeapAdapterExecutor<2, BLOCKS, BLOCKS, BLOCK_SIZE, BLOCK_SIZE>>);
31
32#[cfg(feature = "cuda")]
33pub(crate) type AlgebraRecord<
34    'a,
35    const NUM_READS: usize,
36    const BLOCKS: usize,
37    const BLOCK_SIZE: usize,
38> = (
39    &'a mut Rv32VecHeapAdapterRecord<NUM_READS, BLOCKS, BLOCKS, BLOCK_SIZE, BLOCK_SIZE>,
40    FieldExpressionCoreRecordMut<'a>,
41);
openvm_algebra_circuit/lib.rs

openvm_algebra_circuit/
lib.rs
