Expand description
Traits and types describing the core interfaces of the verifier sub-circuit. The verifier sub-circuit verifies multiple proofs for the same child verifying key. It supports recursive verification, where the child verifying key is equal to the verifying key of the verifier circuit itself.
Modules§
Structs§
- Batch
Constraint Preflight - BusIndex
Manager - BusInventory
- GkrPreflight
- Global
CtxCpu - Poseidon
State Pair - A pre-state/post-state pair for a single Poseidon permutation.
- Preflight
- The records from global recursion preflight on CPU for verifying a single proof.
- Proof
Shape Preflight - Stacking
Preflight - Verifier
Config - Verifier
External Data - Verifier
SubCircuit - The recursive verifier sub-circuit consists of multiple chips, grouped into modules.
- Whir
Preflight
Enums§
Traits§
- Aggregation
SubCircuit - AirModule
- Global
Trace GenCtx - Trait defining the types for the global input shared across modules for trace generation. These types are specialized per hardware backend.
- Trace
GenModule - Trait for generating the trace matrices, on device, for a given AIR module. The module has a view of all proofs being verified as well as the global preflight records from each proof.
- Verifier
Trace Gen